Functional circuit ICs (such as an amplification circuit, a multiplex circuit, and a separation circuit) used in communication devices may have different source voltages because they are formed by different processes or the like.
When the source voltages of the functional circuit ICs connected to each other are different from each other, the DC voltages in the interfaces connected to each other are generally different from each other. When the circuits are connected without removing the DC voltage component, bias voltages of the functional circuits may depart from a designed value. Accordingly, it may not be possible to obtain desired performance.
Therefore, there is a need for a high-frequency transmission line which can remove the DC component and which can transmit a baseband signal component in a broad band with low loss and low reflection characteristics.
Patent Document 1 discloses a configuration in which the distance between a signal line and front and back ground patterns increases only near a capacitor connection portion connected between breaking ends of the signal line.
For example, the high-frequency transmission line disclosed in Patent Document 1 has a high-frequency transmission line structure shown in FIGS. 11 to 14. FIG. 11 is a plan view illustrating the structure of a high-frequency transmission line. FIG. 12 is a sectional view taken along line X-X′ perpendicular to a transmission signal direction shown in FIG. 11. FIG. 13 is a sectional view taken along line Y-Y′ perpendicular to a transmission signal direction shown in FIG. 11. FIG. 14 is a plan view illustrating the high-frequency transmission line from which a capacitor is removed.
The high-frequency transmission line shown in FIGS. 11 to 14 includes a single-layered dielectric substrate 40. The high-frequency transmission line formed in the dielectric substrate 40 is a grounded coplanar line (back-grounded coplanar line).
This high-frequency transmission line includes a signal line 10 formed on a front surface of the dielectric substrate 40, front ground patterns 20 disposed on the same surface as the signal line 10 with the signal line interposed therebetween, and a back ground pattern 60 (FIGS. 12 and 13) formed on a back surface of the dielectric substrate 40.
The front ground pattern 20 and the back ground pattern 60 are electrically connected to each other via plural conductive vias 30 arranged in the signal transmission direction of the signal line 10.
In the high-frequency transmission line, a part of the signal line 10 forming the high-frequency transmission line is broken to interrupt the DC component. A capacitor 50 (FIGS. 11 and 13) is connected to the breaking ends 101 (FIGS. 12 and 14).
In the back-grounded coplanar line as the high-frequency transmission line, when the breaking ends 101 are formed in the signal line 10 and the capacitor 50 is built between the breaking ends 101, floating capacitance is generated between the electrode side surface of the capacitor 50 and the ground pattern (the front ground pattern 20 and/or the back ground pattern 60), whereby a mismatch may be easily caused. As a result, reflection can be easily caused with an increase in frequency and the insertion loss also increases with the increase in reflection.
Therefore, in Patent Document 1, the distance between the signal line 10 of the high-frequency transmission line and the front ground patterns 20 increases only on both sides of the capacitor 50, as shown in FIGS. 11 to 14. Accordingly, it is possible to reduce the floating capacitance between the electrode side surface of the capacitor and the front ground pattern 20, thereby suppressing the impedance mismatch and reducing the reflection.
In the above-mentioned technique, the distance between the signal line 10 and the front ground pattern 20 increases only on both sides of the capacitor 50. Accordingly, the floating capacitance between the electrode side surface of the capacitor and the front ground pattern 20 is reduced, thereby improving the reflection characteristic and reducing the insertion loss.
However, the first problem of the technique is that the line size increases to enhance the distance between the signal line 10 and the front ground pattern 20. The second problem is that the reflection characteristic deteriorates and the insertion loss increases, as the frequency of the transmission signal increases. The reason will be described with reference to FIG. 15, which, as illustrated, includes the same functional parts as the constituent elements shown in FIGS. 11 to 14 and are referenced by the same reference numerals and signs.
In the configuration shown in FIGS. 11 to 14, when a signal is transmitted, high-frequency current flows through the signal line 10 and the front ground pattern 20 of the high-frequency transmission line. In the high-frequency current, the current flowing through the signal line 10 flows along the stereo shape of the capacitor which is the longest path in the connection portion of the capacitor 50, as indicated by path A in FIG. 15.
On the other hand, the current flowing through the front ground pattern 20 flows along the edge of the front ground pattern 20 close to the signal line, as indicated by path B in FIG. 15.
Here, when two physical path lengths are L1 and L2, respectively, the path length difference L1-L2 is ΔL, the wavelength of the transmission signal in vacuum is λ0, the wave numbers of the paths are the same k, and the effective relative permittivities of the paths are the same ∈r, the phase difference Z between the two paths A and B is expressed by Equation (1).
                    Z        =                                            k              ×                              L                1                                      -                          k              ×                              L                2                                              =                                    k              ×              Δ              ⁢                                                          ⁢              L                        =                                                            (                                                            2                      ⁢                      π                                                                                      λ                        0                                            /                                                                        ɛ                          r                                                                                                      )                                ×                Δ                ⁢                                                                  ⁢                L                            =                                                (                                      2                    ⁢                    π                    ×                                                                  ɛ                        r                                                                              )                                ×                                  (                                                            Δ                      ⁢                                                                                          ⁢                      L                                                              λ                      0                                                        )                                                                                        (        1        )            
As expressed by Equation (1), the phase difference Z is proportional to ΔL/λ0. Accordingly, even when the physical path length difference ΔL is constant, the phase difference between the paths increases as the frequency of the transmission signal increases, that is, as the wavelength λ0 decreases. Therefore, since the equivalent phase cannot be kept, the reflection will increase accordingly.
That is, even by using the method disclosed in Patent Document 1 in the configuration shown in FIGS. 11 to 14, it is not possible to improve the reflection characteristic as the frequency of the transmission signal increases. In addition, since the ratio at which the transmittable power is reflected increases, the insertion loss increases.
Patent Document 2 discloses a high-frequency substrate including two or more dielectric substrates. That is, Patent Document 2 discloses a configuration in which RF lines formed on a dielectric substrate are connected through a coplanar line formed in a dielectric film or a back-grounded coplanar line.
According to this configuration, the impedance can be matched and the standing wave ratio can be improved, but it is not possible to remove the DC current.    Patent Document 1: Japanese Unexamined Patent Publication, First Publication No. 2004-129053    Patent Document 2: Japanese Unexamined Patent Publication, First Publication No. H06-188603